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Kintex-7 FPGAs Data Sheet: DC and AC Switching Characteristics
Table 66: CPRI Protocol Characteristics
Description
Line Rate (Mb/s)
Min
Max
Units
CPRI Transmitter Jitter Generation
614.4
1228.8
2457.6
–
–
–
0.35
0.35
0.35
UI
UI
UI
Total transmitter jitter
3072.0
4915.2
6144.0
9830.4
–
–
–
–
0.35
0.3
0.3
Note 1
UI
UI
UI
UI
CPRI Receiver Frequency Jitter Tolerance
614.4
1228.8
2457.6
0.65
0.65
0.65
–
–
–
UI
UI
UI
Total receiver jitter tolerance
3072.0
4915.2
6144.0
9830.4
0.65
0.95
0.95
Note 1
–
–
–
–
UI
UI
UI
UI
Notes:
1.
Tested per SFP+ specification, see Table 65 .
Integrated Interface Block for PCI Express Designs Switching Characteristics
More information and documentation on solutions for PCI Express designs can be found at:
w ww.xilinx.com/technology/protocols/pciexpress.htm
Table 67: Maximum Performance for PCI Express Designs
Speed Grade
Symbol
Description
-3
1.0V
-2/-2L
-1/-1M
0.9V
-2L
Units
F PIPECLK
F USERCLK
F USERCLK2
F DRPCLK
Pipe clock maximum frequency
User clock maximum frequency
User clock 2 maximum frequency
DRP clock maximum frequency
250.00
500.00 (1)
250.00
250.00
250.00
500.00 (1)
250.00
250.00
250.00
250.00
250.00
250.00
250.00
250.00
250.00
250.00
MHz
MHz
MHz
MHz
Notes:
1.
PCI Express x8 Gen 3 operation is only supported in -2 and -3 speed grades.
DS182 (v2.8) March 4, 2014
Product Specification
www.xilinx.com
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